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Firma:
onsemi
(zaměstnavatel)
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Pracovní poměr:
práce na plný úvazek
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Smluvní vztah:
pracovní smlouva (na dobu neurčitou)
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Vzdělání:
vysokoškolské / univerzitní
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Jazyky:
angličtina (pokročilá)
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Benefity:
vzdělávací kurzy, školení, ubytování/příspěvek na ubytování, stravenky/příspěvek na stravování, dovolená 5 týdnů, zdravotní volno/sickday, možnost občasné práce z domova, příspěvek na sport/kulturu/volný čas, kafetérie, bonusy/prémie, příspěvek na dopravu, flexibilní začátek/konec pracovní doby, notebook, příspěvek na penzijní/životní připojištění
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Zařazení:
technický ředitel/manažer, technika, elektrotechnika a energetika
onsemi is a global company with 33,000 employees worldwide and over 2,200 employees in the Czech Republic.
With its global logistics network and strong product portfolio, onsemi Brno is a preferred supplier of efficient semiconductor technologies to customers in the computing, communications, consumer, automotive, medical, industrial, and military/aerospace markets.
We are currently offering this excellent opportunity in our design center in Brno, Czech Republic:
About the Role
We are seeking a highly capable Senior Analog Design Manager to lead the architecture, development, and delivery of complex analog and mixed-signal IP blocks. While the role is primarily analog-focused, candidates with experience in Non-Volatile Memory (NVM), OTP, or embedded memory architectures will be strongly preferred.
This leader will guide multi-disciplinary teams across design, verification, layout, product engineering, and technology development to deliver high-quality IP across multiple technology nodes.
What You’ll Do
- Lead design and development of analog/AMS IP such as:
- Voltage/current references (BGR), amplifiers, ADC/DAC interfaces
- High-voltage charge pumps/regulators (especially relevant to NVM/OTP)
- Oversee circuit architecture, modeling, top-level AMS integration, and corner/Monte Carlo analysis.
- Drive design reviews, spec ownership, performance validation, and silicon correlation.
- Ensure robust methodologies:
- Reliability analysis (EM, BTI, TDDB)
- Noise coupling/PSRR, transient/small-signal analysis
- ESD, latch-up, and layout-dependent effects
- Guide design flows for Verilog-A/AMS modeling and mixed-signal simulation (AMS, SPICE, FastSPICE).
- Manage end-to-end IP execution, from concept definition to tape-out and silicon bring-up.
- Own schedules, resource planning, risk management, and cross-team alignment.
- Ensure predictable and high-quality analog IP releases aligned with platform/product milestones.
- Lead and mentor a team of analog/AMS designers.
- Foster collaborative culture, innovation, and continuous improvement.
- Drive clear accountability, decision-making, and results-oriented execution.
What We’re Looking For
- 10+ years of experience in analog or mixed-signal IC design, preferably in advanced technology nodes.
- Proven track record leading analog IP development through full lifecycle to production.
- Strong understanding of CMOS device physics, analog design fundamentals, and layout-sensitive effects.
- Experience managing and mentoring engineering teams (direct or matrix).
- Exposure to NVM/OTP memory IP or embedded memory analog subsystems.
- Excellent execution discipline and ability to manage complex programs.
